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A multiprocessor working as a Fault-Tolerant cellular automaton

Byline: W. Handler (1) Keywords: 68D20; 68B20; Multiprocessor (MIMD); cellular automaton; vertical processing (SIMD); fault-tolerant computation A memory-coupled multiprocessor--well suited to bit-wise operation--can be utilized to operate as a 1024 items cellular processing unit. Each processor is... Full description

Journal Title: Computing 1992, Vol.48 (1), p.5-20
Main Author: Handler, W
Format: Electronic Article Electronic Article
Language: English
Subjects:
Publisher: Wien: Springer
ID: ISSN: 0010-485X
Link: http://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=4354783
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recordid: cdi_gale_infotracacademiconefile_A153917818
title: A multiprocessor working as a Fault-Tolerant cellular automaton
format: Article
creator:
  • Handler, W
subjects:
  • Applied sciences
  • Computer science
  • control theory
  • systems
  • Exact sciences and technology
  • Robots
  • Theoretical computing
ispartof: Computing, 1992, Vol.48 (1), p.5-20
description: Byline: W. Handler (1) Keywords: 68D20; 68B20; Multiprocessor (MIMD); cellular automaton; vertical processing (SIMD); fault-tolerant computation A memory-coupled multiprocessor--well suited to bit-wise operation--can be utilized to operate as a 1024 items cellular processing unit. Each processor is working on 32 bits and 32 such processors are combined to a multiprocessor. The information is stored in "vertical" direction, as it is defined and described in earlier papers [1] on "vertical processing". The two-dimensional array (32 times 32 bits) is composed of the 32 bit-machine-words of the coupled processors on the one hand and of 32 processors in nearest-neighbour-topology on the other hand. The bit-wise cellular operation at one of the 1024 "points" is realized by the program of the processor--possibly assisted by appropriate microprogam sequences. (German): Ein speichergekoppelter Multiprocessor--gut geeignet fur bit-weises Operieren--kann betrieben werden als ein 1024-elementiger zellularer Feldrechner. Jeder Prozessor arbeitet auf 32 bits (Wortlange d. Prozessors) und 32 solche Prozessoren werden zu einem Multiprozessor kombiniert. Die Information wird in "vertikaler" Richtung gespeichert, wie in fruheren Arbeiten [1] uber Vertikal-Verarbeitung beschrieben wird. Das zweidimensionale Array (32x32 bit) setzt sich zusammen aus den 32-bit-Maschinenwortern der gekoppelten Prozessoren einerseits und von den 32 Prozessoren in nearest-neighbour-topology andererseits. Die bitweise zellulare Verarbeitung auf einem der 1024 "Punkte" wird duch das Programm des jeweiligen Prozessors realisiert--moglicherweise unterstutzt durch entsprechende Mikroprogramme. Author Affiliation: (1) Institut fur Mathematische Maschinen und Datenverarbeitung (Informatik), Universitat Erlangen-Nurnberg, Martensstr. 3, D-W-8520, Erlangen, Federal Republic of Germany Article History: Registration Date: 19/10/2005 Received Date: 15/08/1991 Article note: Dedicated to Professor Willard L. Miranker on the occasion of his 60th birthday
language: eng
source:
identifier: ISSN: 0010-485X
fulltext: no_fulltext
issn:
  • 0010-485X
  • 1436-5057
url: Link


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descriptionByline: W. Handler (1) Keywords: 68D20; 68B20; Multiprocessor (MIMD); cellular automaton; vertical processing (SIMD); fault-tolerant computation A memory-coupled multiprocessor--well suited to bit-wise operation--can be utilized to operate as a 1024 items cellular processing unit. Each processor is working on 32 bits and 32 such processors are combined to a multiprocessor. The information is stored in "vertical" direction, as it is defined and described in earlier papers [1] on "vertical processing". The two-dimensional array (32 times 32 bits) is composed of the 32 bit-machine-words of the coupled processors on the one hand and of 32 processors in nearest-neighbour-topology on the other hand. The bit-wise cellular operation at one of the 1024 "points" is realized by the program of the processor--possibly assisted by appropriate microprogam sequences. (German): Ein speichergekoppelter Multiprocessor--gut geeignet fur bit-weises Operieren--kann betrieben werden als ein 1024-elementiger zellularer Feldrechner. Jeder Prozessor arbeitet auf 32 bits (Wortlange d. Prozessors) und 32 solche Prozessoren werden zu einem Multiprozessor kombiniert. Die Information wird in "vertikaler" Richtung gespeichert, wie in fruheren Arbeiten [1] uber Vertikal-Verarbeitung beschrieben wird. Das zweidimensionale Array (32x32 bit) setzt sich zusammen aus den 32-bit-Maschinenwortern der gekoppelten Prozessoren einerseits und von den 32 Prozessoren in nearest-neighbour-topology andererseits. Die bitweise zellulare Verarbeitung auf einem der 1024 "Punkte" wird duch das Programm des jeweiligen Prozessors realisiert--moglicherweise unterstutzt durch entsprechende Mikroprogramme. Author Affiliation: (1) Institut fur Mathematische Maschinen und Datenverarbeitung (Informatik), Universitat Erlangen-Nurnberg, Martensstr. 3, D-W-8520, Erlangen, Federal Republic of Germany Article History: Registration Date: 19/10/2005 Received Date: 15/08/1991 Article note: Dedicated to Professor Willard L. Miranker on the occasion of his 60th birthday
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descriptionByline: W. Handler (1) Keywords: 68D20; 68B20; Multiprocessor (MIMD); cellular automaton; vertical processing (SIMD); fault-tolerant computation A memory-coupled multiprocessor--well suited to bit-wise operation--can be utilized to operate as a 1024 items cellular processing unit. Each processor is working on 32 bits and 32 such processors are combined to a multiprocessor. The information is stored in "vertical" direction, as it is defined and described in earlier papers [1] on "vertical processing". The two-dimensional array (32 times 32 bits) is composed of the 32 bit-machine-words of the coupled processors on the one hand and of 32 processors in nearest-neighbour-topology on the other hand. The bit-wise cellular operation at one of the 1024 "points" is realized by the program of the processor--possibly assisted by appropriate microprogam sequences. (German): Ein speichergekoppelter Multiprocessor--gut geeignet fur bit-weises Operieren--kann betrieben werden als ein 1024-elementiger zellularer Feldrechner. Jeder Prozessor arbeitet auf 32 bits (Wortlange d. Prozessors) und 32 solche Prozessoren werden zu einem Multiprozessor kombiniert. Die Information wird in "vertikaler" Richtung gespeichert, wie in fruheren Arbeiten [1] uber Vertikal-Verarbeitung beschrieben wird. Das zweidimensionale Array (32x32 bit) setzt sich zusammen aus den 32-bit-Maschinenwortern der gekoppelten Prozessoren einerseits und von den 32 Prozessoren in nearest-neighbour-topology andererseits. Die bitweise zellulare Verarbeitung auf einem der 1024 "Punkte" wird duch das Programm des jeweiligen Prozessors realisiert--moglicherweise unterstutzt durch entsprechende Mikroprogramme. Author Affiliation: (1) Institut fur Mathematische Maschinen und Datenverarbeitung (Informatik), Universitat Erlangen-Nurnberg, Martensstr. 3, D-W-8520, Erlangen, Federal Republic of Germany Article History: Registration Date: 19/10/2005 Received Date: 15/08/1991 Article note: Dedicated to Professor Willard L. Miranker on the occasion of his 60th birthday
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abstractByline: W. Handler (1) Keywords: 68D20; 68B20; Multiprocessor (MIMD); cellular automaton; vertical processing (SIMD); fault-tolerant computation A memory-coupled multiprocessor--well suited to bit-wise operation--can be utilized to operate as a 1024 items cellular processing unit. Each processor is working on 32 bits and 32 such processors are combined to a multiprocessor. The information is stored in "vertical" direction, as it is defined and described in earlier papers [1] on "vertical processing". The two-dimensional array (32 times 32 bits) is composed of the 32 bit-machine-words of the coupled processors on the one hand and of 32 processors in nearest-neighbour-topology on the other hand. The bit-wise cellular operation at one of the 1024 "points" is realized by the program of the processor--possibly assisted by appropriate microprogam sequences. (German): Ein speichergekoppelter Multiprocessor--gut geeignet fur bit-weises Operieren--kann betrieben werden als ein 1024-elementiger zellularer Feldrechner. Jeder Prozessor arbeitet auf 32 bits (Wortlange d. Prozessors) und 32 solche Prozessoren werden zu einem Multiprozessor kombiniert. Die Information wird in "vertikaler" Richtung gespeichert, wie in fruheren Arbeiten [1] uber Vertikal-Verarbeitung beschrieben wird. Das zweidimensionale Array (32x32 bit) setzt sich zusammen aus den 32-bit-Maschinenwortern der gekoppelten Prozessoren einerseits und von den 32 Prozessoren in nearest-neighbour-topology andererseits. Die bitweise zellulare Verarbeitung auf einem der 1024 "Punkte" wird duch das Programm des jeweiligen Prozessors realisiert--moglicherweise unterstutzt durch entsprechende Mikroprogramme. Author Affiliation: (1) Institut fur Mathematische Maschinen und Datenverarbeitung (Informatik), Universitat Erlangen-Nurnberg, Martensstr. 3, D-W-8520, Erlangen, Federal Republic of Germany Article History: Registration Date: 19/10/2005 Received Date: 15/08/1991 Article note: Dedicated to Professor Willard L. Miranker on the occasion of his 60th birthday
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